1. Field of the Invention
The present invention generally relates to a memory circuit, and particularly relates to a nonvolatile memory circuit which is capable of retaining stored data in the absence of a power supply voltage.
2. Description of the Related Art
Nonvolatile semiconductor memory devices, which can retain stored data even when power is turned off, conventionally include flash EEPROM employing a floating gate structure, FeRAM employing a ferroelectric film, MRAMs employing a ferromagnetic film, etc. There is a new type of nonvolatile semiconductor memory device called PermSRAM. PermSRAM uses a pair of MIS (metal-insulating film-semiconductor) transistors as a nonvolatile memory cell (i.e., the basic unit of data storage). The MIS transistors used as a nonvolatile memory cell in PermSRAM have the same structure as ordinary MIS transistors used for conventional transistor functions (e.g., switching function), and do not require a special structure such as a floating gate or a special material such as a ferroelectric material or ferromagnetic material. The absence of such a special structure and special material offers an advantage in cost reduction. PermSRAM was initially disclosed in PCT/JP2003/016143, which was filed on Dec. 17, 2003, the entire contents of which are hereby incorporated by reference.
The pair of MIS transistors used as a nonvolatile memory cell in PermSRAM are configured to selectively experience an irreversible hot-carrier effect on purpose for storage of one-bit data. Here, the irreversible hot-carrier effect refers to the injection of electrons into an oxide film of a selected transistor, which creates a shift in the threshold voltage of this transistor A difference in the transistor characteristics (i.e., difference in the threshold voltage) between the two MIS transistors caused by the hot-carrier effect represents one-bit data “0” or “1”. Such a difference may be detected as a difference in the ON current between the two MIS transistors by using a sensing circuit such as a one-bit static memory circuit (latch) coupled to the MIS transistor pair.
In order to store data in a pair of MIS transistors, it is necessary to create a detectable difference in the threshold voltages. Each MIS transistor has its own transistor characteristics, depending on which the time required to create a detectable change in the threshold voltage varies. Some MIS transistors may require a significant amount of time in order for a detectable shift in the threshold voltage to be created. Other MIS transistors may require only a short period of time in order for such shift to be created. In other words, the time required to store data in a memory cell comprised of a pair of MIS transistors varies depending on the memory cell, and thus has a certain distribution range. In order to make sure that data is reliably stored in a given memory cell, generally, a time length that is sufficient even for a worst-case memory cell to safely store data needs to be spent for the process of storing data in this given memory cell. Such configuration operating with a safety margin designed for the worst case memory cell, however, is not efficient.
There is thus a need for PermSRAM that can efficiently store data in an optimum store time.